1. Field of the Invention
The present invention relates to a floating point operation unit, and more particularly, relates to an operation unit for executing division or square root operations on numerical values expressed by a floating point notation.
2. Description of the Related Art
An operation using a floating point notation provides a wide dynamic range and a high accuracy, and therefore, the floating point operation is currently used to enable various high grade operations, and particularly, a high speed processing of division and square root operations.
In conventional division operations two methods are used: subtraction and shift, and a converging method, for example, the Newton-Raphson method. In the former method, the shifted divisor is repeatedly subtracted from a dividend; an example of this is the non-restoring method, and in an improved non-restoring method a quotient can be obtained at a high speed. In the latter method, a reciprocal of the divisor is calculated by a converging method and the reciprocal is multiplied by the dividend to obtain the quotient. In this method, the number of operation cycles needed to realize a convergence is reduced due to a close similarity of the initial assumed reciprocal value to a true value.
The converging method (e.g., Newton-Raphson method) is also used for a square root operation. In this method, to obtain a square root of a number B, first 1/.sqroot.B is obtained, the obtained value is multiplied by B, and .sqroot.B is obtained. When the calculation of 1/.sqroot.B is executed by the Newton-Raphson method, the number of cycles is reduced due to the close similarity of the initial assumed reciprocal value to a true value.
Many of the known floating point operation units utilize the Newton-Raphson method because, in the other methods, the quotient obtained by one cycle is at most 3 to 4 bits, and to obtain the final quotient, the calculations must be repeated for eight cycles in an IEEE single-precision standard. Conversely, in the Newton-Raphson method, if the initial value of the reciprocal can be given within a certain limit, the quotient is obtained by a converging calculation of about 3 to 4 cycles, and accordingly, in the dividing operation using the Newton-Raphson method, the quotient can be obtained at a higher speed than with the other methods. Many units also utilize the Newton-Raphson method for the square root operation, since in this method, if the initial reciprocal value is given within a certain limit, a converging calculation of about 3 to 4 cycles is sufficient, and accordingly, the square root operation by the Newton-Raphson method can be processed at a high speed.
The division operation using the Newton-Raphson method is explained below.
First, when the division is executed, a reciprocal function is calculated. For example, the division C=A/B is expressed as C=A(1/B) using a reciprocal form. The reciprocal function (1/B) is expressed by the Newton-Raphson method as follows. EQU X.sub.i+1 =X.sub.i (2-BX.sub.i)
Where, i=0, 1, 2, . . . , X.sub.0 is the initial reciprocal of a divisor corresponding to i=0, and X.sub.i expresses an ith approximation of (1/B). If the initial value X.sub.0 satisfies the following inequality, (2/B)&gt;.vertline.X.sub.0 .vertline.&gt;0, the operation is completed. In a typical method of obtaining the initial value, approximately the upper 10 bits of the divisor are used as a pointer of a memory (ROM) in a look up table. The ROM outputs the initial value in response to an address pointed out by bits of the divisor. Usually, the bit number of an output (bit number of X.sub.0) is approximately the same as the bit number of an input (approximately upper 10 bits of the divisor). In the case of the division in the floating point operation, the reciprocal of an exponent portion and a mantissa portion are obtained from individual look up tables (ROM).
The conventional division process is explained below.
First, two binary data A and B are expressed by the floating point notation, as follows, EQU A=(-1).sup.Sa 2.sup.Ea-BS (1.multidot.Fa) EQU B=(-1).sup.Sb 2.sup.Eb-BS (1.multidot.Fb)
and the following operations are executed. The mantissas (1.multidot.Fa) and (1.multidot.Fb) of the input data A and B, respectively are multiplied by each other through a fixed point multiplication circuit, and the result (1.multidot.Fa).times.(1.multidot.Fb) is obtained. Namely, the result is 1.xxxx . . . or 1x.xxxx . . . , and although 1.xxxx . . . is already normalized, 1x.xxxx . . . still remains to be normalized. This normalization is executed by shifting the data to the right by one bit and by increasing the exponent portion by one in response to an overflow signal. Then, the normalized value is rounded off to match the output data form. If the bits are all "1", an overflow occurs, and in this case the data is shifted by one bit to the right. The above processes provide a final output which is the normalized number.
In the exponent portion, the operation of (Ea+Eb) is executed and the result is added to a negative bias (-BS); i.e., (Ea+Eb-BS) is obtained. Then, when the overflow must be corrected by normalization, the mantissa value is incremented by one. For a correction of the overflow by rounding off, the increment by one is previously executed.
The operation in the sign operation portion is performed by an exclusive OR circuit.
When the division operation is carried out using the above conventional floating point operation unit, the binary calculation of (2-BX.sub.i) necessary in the division using the converging method cannot be executed in one step. Namely, to calculate the repeating calculation executed when the reciprocal of the divisor is obtained by the converging method, i.e., X.sub.i+1 =X.sub.i (2-BX.sub.i), the multiplication BX.sub.i, the subtraction (2-BX.sub.i) and the multiplication X.sub.i (2-BX.sub.i) are necessary. Therefore, the total processing time is prolonged and it becomes difficult to realize a high speed operation.
Further, an addition or subtraction circuit must be added to execute the subtraction in (2-BX.sub.i). Assuming that the above X.sub.i+1 =X.sub.i (2-BX.sub.i) is performed by an addition of the above circuit, still three arithmetic operations must be repeated, and thus no improvement is obtained from the view point of a high speed operation of the floating point division process.
The square root operation using the Newton-Raphson method is explained. When the square root operation is carried out, first a reciprocal function is calculated, for example, C=.sqroot.B is expressed as C=B(1/.sqroot.B). The repeat expression of the Newton-Raphson method is as follows. EQU X.sub.i+1 =(1/2)*X.sub.i (3-BX.sub.i.sup.2)
Where X.sub.0 corresponding to i=0 is an approximate value of the initial reciprocal of .sqroot.B, X.sub.i is an ith approximation value, and the asterisk indicates multiplication. If the initial value X.sub.0 satisfies the inequality 0&lt;X.sub.0 &lt;.sqroot.3/B, the operation is completed. In a typical method of obtaining the initial value, the approximately upper 10 bits of B are applied to a look up table (ROM) as a pointer, and the ROM outputs the initial value from the memory addressed by the value of B. Usually, the output bit number is approximately the same as the input bit number. Generally, in the square root operation by the floating point operation, the reciprocals of the exponent and the mantissa are stored in individual look up tables.
In the square root operation, repeated calculations of X.sub.i+1 =(1/2)*X.sub.i (3-BX.sub.i.sup.2) must be made for carrying out the following five arithmetic operations.
MLT: B*X.sub.i (hereinafter B*X.sub.i =A) PA0 MLT: A*X.sub.i PA0 SUB: 3-(A*X.sub.i) PA0 MLT: X.sub.i *(3-(A*X.sub.i)) PA0 MLT: (1/2)*(X.sub.i *(X.sub.i *(3-(A*X.sub.i)))
Where MLT: multiplication, SUB: subtraction. Accordingly, the total operation time is prolonged and it becomes difficult to execute a high speed operation.